Cache Information for Processor <n>

Use this window to view cache information for each cache present on the microprocessor.

Cache

Cache is small high-speed memory that contains the most recently accessed pieces of main memory. The cache keeps a copy of data or instructions from main memory for quicker retrieval. Cache decreases the amount of time it takes to move data from main memory to the processor and back again. The processor cache is faster than the system's main RAM. 

Cache Information for a Particular Processor on Connector n
note.gif NOTE: Some cache devices are internal to the processors on which they reside. When the cache is internal to a processor, the following fields and their values do not appear in the Cache Information for Processor on Connector n window:
  • Speed

  • Cache Device Supported Type

  • Cache Device Current Type

  • External Socket Name

The following fields are defined for a cache device on a particular processor. Some fields do not appear if the cache is internal to the processor.

Status Whether the cache on the processor is enabled or disabled.
Level Primary level cache is a memory bank built into the processor. Secondary cache is a staging area that feeds the primary cache. Secondary level cache may be built into the processor or reside in a memory chip set outside the processor.

The internal processor cache is referred to as a Level 1 (or L1). L2 cache is the external cache in an IntelŪ PentiumŪ processor system, and it is the second level of cache that is accessed. The names L1 and L2 do not depend on where the cache is physically located, (internal or external), but on which cache is accessed first (L1, therefore internal).

Speed Rate that the cache can forward data from main memory to the processor.
Max Size Maximum memory that the cache can occupy in KB.
Installed Size Actual size of the cache.
Type Whether the cache is primary or secondary.
Location Whether the cache is located on the processor or on a chip set outside the processor.
Write Policy A write policy describes how the cache deals with a write cycle. 

In a write-back policy, the cache acts like a buffer. When the processor starts a write cycle, the cache receives the data and stops the cycle. The cache then writes the data back to main memory when the system bus is available. 

In a write-through policy, the processor writes through the cache to main memory. The write cycle does not complete until the data is stored into main memory. 

Associativity Fully Associative cache allows any line in main memory to be stored at any location in the cache.

4-Way Set-Associative cache directly maps four specific lines of memory to the same four lines of cache. 

3-Way Set-Associative cache directly maps three specific lines of memory to the same three lines of cache. 

2-Way Set-Associative cache directly maps two specific lines of memory to the same two lines of cache. 

1-Way Set-Associative cache directly maps a specific line of memory in the same line of cache. For example, Line 0 of any page in memory must be stored in Line 0 of cache memory.

Cache Device Supported Type Type of static random access memory (SRAM) that the device can support.
Cache Device Current Type Type of the currently installed SRAM that the cache is supporting.
External Socket Name Silk screen name printed on the system board next to the socket.
Error Correction Type Identifies the type of error checking and correction (ECC) that this memory can perform. For example, single-bit ECC or multibit ECC.

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