Project Name: FIR Filter core

Specifications

Description

FIR, or Finite Impulse Response, filters have the distinctive trait that their impulse response lasts for a finite duration of time as opposed to IIR, or Infinite Impulse Response, filters whose impulse response is infinite in duration.


Typical block diagram of a TAP unit in typical FIR filters

Currently FIR filter core uses two dual-port memories for accessing input samples (first circular FIFO) and coefficients (second circular FIFO). It takes NUM_TAPS+1 to compute new output sample. Supported DP memory is of Xilinx Virtex/Spartan2 FPGAs. Also a generic DP memory is provided (it synthesizes into flip-flops).


Block diagram of our "sequential" FIR filter core

Synthesis

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