head 1.1; access; symbols; locks; strict; comment @# @; 1.1 date 2008.07.03.16.53.44; author dimo; state Exp; branches; next ; commitid 1ed4486d04104567; desc @@ 1.1 log @*** empty log message *** @ text @;Programm Uhr für den FPGA-Prozessor ;Andre Lange ;18.9.96 lda #0 sta 251 ;Initialisierung DelMinH lda #48 sta MinH DelMinL lda #48 sta MinL DelSekH lda #48 sta SekH DelSekL lda #48 sta SekL ;Sekunden stellen Stellen lda 251 ldb #254 ;Taster add jmpz DelSekH ;Minuten stellen lda 251 ldb #255 ;Schalter add jmpz CopySek jmp Pause CopySek lda SekL sta MinL lda SekH sta MinH Pause lda #243 ;Warteschleife sta 0 lda #255 sta 1 wait lda 1 ldb #255 add nop sta 1 jmpc wait lda 0 ldb #255 add sta 0 jmpc wait IncSekL lda SekL ;INC SekL ldb #1 add sta SekL ldb #199 ;>'9'? add jmpc IncSekH jmp Stellen IncSekH lda SekH ;INC SekH ldb #1 add sta SekH ldb #203 ;>'5'? add jmpc IncMinL jmp DelSekL IncMinL lda MinL ;INC MinL ldb #1 add sta MinL ldb #199 ;>'9'? add jmpc IncMinH jmp DelSekH IncMinH lda MinH ;INC MinH ldb #1 add sta MinH ldb #203 ;>'5'? add jmpc DelMinH jmp DelMinL ;Deklaration der Variablen .mem 252 SekL db 0 SekH db 0 MinL db 0 MinH db 0 @